It is well established that three-phase power-factor-correction (PFC) rectifiers with three or more switches exhibit superior power factor (PF) and total harmonic distortion (THD) compared with those implemented with a fewer number of switches that cannot actively shape each phase current independently. However, because of the simplicity and low cost, single and two switch rectifiers are still very attractive for employment in cost-sensitive applications.
FIG. 1 shows the most commonly employed prior art three-phase single-switch rectifier. This simple three-phase boost rectifier performs low-harmonic rectification by operating in the discontinuous-conduction mode (DCM), i.e., by allowing the boost inductors to completely discharge their energies in each switching cycle. As well known, in the DCM of operation, line currents of the boost rectifier tend to naturally follow the respective line voltages, which results in improved THD and PF of the line currents. Since the inductor currents are not directly regulated, the switch is exclusively used to regulate the output voltage with a low-bandwidth constant-frequency control. As reported in the literature, the circuit in FIG. 1 can achieve the THD in the 10-20% and the PF in the 0.94-0.96 range, respectively, which may be sufficient in some applications.
Generally, the major obstacle to achieving a better THD is relatively long discharging times of the boost inductors compared to their charging times. Namely, the charging currents of the inductors (during the intervals the switch is on) are proportional to their respective phase voltages and, therefore, do not contribute to current distortion. However, the discharging current of each inductor (during the intervals the switch is off) is proportional to differences between the output voltage and all three-phase voltages, which introduces a distortion in the average phase currents. To minimize the current distortion, the discharging time of the inductors is made as short as possible by increasing the reset voltage of the inductors.
For a given input voltage, the reset voltage of the inductors can only be increased by increasing the output voltage. Since the output voltage in the circuit in FIG. 1 is already high (around 750 V for 380-V three-phase line-to-line input) because the boost operation requires that the output voltage is greater than twice the peak phase voltage, improvement of THD by increasing output voltage is not practical. Namely, an output voltage increase would require components with higher voltage ratings that are generally more expensive, as well as less efficient due to their increased conduction and switching losses.
The THD of the circuit can also be improved by various harmonic injection techniques. Since these techniques improve THD based on the control circuit refinements rather than power stage redesign, they do not suffer from cost and efficiency penalty. However, the improvements obtained by the reported harmonic-injection techniques are relatively modest.
Further THD and PF performance improvements can be obtained by resorting to two-switch three-phase rectifier implementations. FIG. 2 shows one prior art embodiment of this class of three-phase rectifiers. A detailed operation of the circuit is described in the paper “Quasi-Soft-Switching Partly Decoupled Three-Phase PFC with Approximate Unity Power Factor,” by D. Xu et al., published at the IEEE Applied Power Electronics Conference (APEC) in 1998.
Generally, voltage stresses across the switch components are lowered in this circuit by connecting the neutral conductor to the mid-point of the switches and split output capacitors. This connection partially decouples the phase currents, i.e., makes the phase currents for the most part of the line period dependent only on their corresponding phase voltage, i.e., makes the three-phase PFC rectifier operate as three independent single-phase PFC rectifiers for most of a line period. As well known, in the single-phase PFC boost rectifier, line-current distortion can be reduced if the converter is always operated at the DCM with a slow band-width output control. Therefore, by operating the circuit in FIG. 2 at the DCM, its PFC can be achieved.
FIG. 3 shows another prior art circuit modifying the circuit in FIG. 2 by creating a virtual neutral for applications where the neutral is not available, i.e., in applications with three-wire power lines. The virtual neutral is obtained by the Y (“star”) connection of capacitors C1, C2, and C3 to the three line voltages. Since in this connection the potential of the common node of the three capacitors is the same as the potential of the neutral point of the power source, the average capacitor voltages are equal to the phase voltages. The circuit in FIG. 3 is described more in details in U.S. Pat. No. 7,005,759, “Integrated Converter Having Three-Phase Power Factor Correction,” by Ying et all.
FIG. 4 illustrates prior art with further THD improvements obtained by removing connection between the mid-point of the switches and the split capacitors. With this connection removed, the reset voltage of the inductor is doubled, i.e., it is increased from one-half of the output voltage (VO/2) to the full output voltage (VO), which shortens the reset time of the inductor currents. The reduced reset (discharge) time of the current makes time intervals where the phases are decoupled shorter with respect to the time that they are not decoupled, which further improves THD.
FIG. 5 shows a prior art circuit with the circuit in FIG. 4 implemented without rectifier diodes DO1 and DO2. A thorough analysis of the circuit in FIG. 5 is given in the paper “A Novel Prototype Discontinuous Inductor Current Mode Operated Three-Phase PFC Power Converter with Four Active Switches,” by K. Nishimura et all., published at the IEEE Power Electronics Specialists' Conference (PESC) in 2006. While the elimination of the rectifiers helps improve efficiency, it makes the interleaving of the circuit in FIG. 5 impossible, which may be a drawback since interleaving is often used to extend the power range of converters operating in DCM or at the CCM/DCM boundary.
One of the major issues of the two-switch three-phase rectifiers shown in FIGS. 2-5 is their EMI performance and, in particular, their common-mode noise. Namely, in all the above implementations, the upper and lower rail of the six-diode bridge rectifier experience fast high-voltage changes every time the corresponding switches are commutated. Furthermore, in the implementations shown in FIGS. 4 and 5 without split capacitors, the load is also subject to these voltage changes, exacerbating the common-mode noise problem. As a result, these circuits typically require multi-stage EMI filters, which increases their cost and size.
Another major issue with the above implementations is that they do not simultaneously provide PFC and voltage balancing of the split capacitors when load is connected across the capacitors. The splitting of the output capacitor and connecting loads across the split capacitors is very often used in today's three-phase rectifiers to enable the employment of downstream converters designed with lower-rated components that are more cost-effective and efficient than their high-voltage-rated counterparts. To use the split capacitor approach, these circuit needs to be supplemented with a voltage balancing circuit, which further increases the cost and may also affect its size.
Therefore, the need exists for a low input-current harmonic three-phase boost rectifier with improved EMI performance. The need further exists for a low input-current harmonic three-phase boost rectifier that simultaneously provides PFC and voltage balancing of split capacitors.